Ecosyste.ms: Timeline
Browse the timeline of events for every public repo on GitHub. Data updated hourly from GH Archive.
timothytrippel pushed 2 commits to earlgrey_1.0.0 lowRISC/opentitan
timothytrippel closed a pull request on lowRISC/opentitan
[manuf] enable toggling external clock on/off during FT individualize
This updates the FT individualize program to be able to select whether the external clock is enabled when running on silicon targets.
timothytrippel pushed 1 commit to earlgrey_1.0.0 lowRISC/opentitan
- [sival] Add support for downstream execution envs. This change adds the ability to run silicon validaton targets on ... 16207cf
timothytrippel closed a pull request on lowRISC/opentitan
[sival] Add support for downstream execution envs.
This change adds the ability to run silicon validaton targets on downstream product configurations of Earl Grey, leveraging the @provisioning_ext local repo extensions.
timothytrippel created a branch on timothytrippel/opentitan
add-more-debug-prints - OpenTitan: Open source silicon root of trust
timothytrippel opened a pull request on lowRISC/opentitan
[manuf] enable toggling external clock on/off during FT individualize
This updates the FT individualize program to be able to select whether the external clock is enabled when running on silicon targets.
timothytrippel created a branch on timothytrippel/opentitan
enable-use-of-ext-clk - OpenTitan: Open source silicon root of trust
timothytrippel opened a pull request on lowRISC/opentitan
[provisioning] enable reentrant provisioning flow
The CP device ID is extracted from flash during CP and passed to FT. If the CP step is skipped, e.g., if the device is already in test_locked*, then host will not know what the CP device ID is. ...
timothytrippel opened a pull request on lowRISC/opentitan
[manuf] cleanup AST CSR init and program CreatorSwCfg last
This update the FT individualization firmware to: 1. not program the AST CSRs twice, as the sram_start.S assembly code that runs during SRAM program initialization already does so (thus reverting ...
timothytrippel created a branch on timothytrippel/opentitan
enable-reentrant-provisioning - OpenTitan: Open source silicon root of trust
timothytrippel pushed 12 commits to use-ext-clk-with-more-prints timothytrippel/opentitan
- [sival/aes] Add aes_prng_reseed,aes_prng_force_reseed This commit introduces the AES PRNG reseed test (chip_sw_aes_p... f812cf5
- [otbn,sival] Enable scramble test on CW340 After enabling the SecureIbex parameter on CW340 (c.f., lowRISC/opentitan... 10b951d
- [sram_ctrl, sival] Enable CW340 ECC checks for scrambled access By enabling the SecureIbex parameter for CW340 (see ... 7795c8a
- [SiVal, usbdev] Link tx_rx_test to vbus_test in tesplan Signed-off-by: Douglas Reis <[email protected]> (cherry pic... 57f7e58
- [CI, nightly] Fix merge skew Fix a merge issue cause when the commit 40289cc was merged into master. Signed-off-by:... c293e17
- [CI, nightly] Rename tag skip_in_nightly_ci to slow_test The new name will make more sense when we create a job to r... 0eaa506
- [CI, nightly] Add a job to run slow tests on CW340 Signed-off-by: Douglas Reis <[email protected]> (cherry picked f... ef02c51
- [bazel] Support CW340 FPGA target Add support for the CW340 target to Bazel rules for cryptotest. Fixes #24418. Si... d8b43d6
- [manuf] cleanup AST CSR init and program CreatorSwCfg last This update the FT individualization firmware to: 1. not ... 4b356ba
- [opentitanlib] add function to read device ID over LC TAP Signed-off-by: Tim Trippel <[email protected]> 5022600
- [provisioning] enable reentrant provisioning flow The CP device ID is extacted from flash during CP and passed to FT... f2abeaa
- TEST ONLY: DO NOT MERGE Signed-off-by: Tim Trippel <[email protected]> d540e64
timothytrippel created a branch on timothytrippel/opentitan
cleanup-ast-write - OpenTitan: Open source silicon root of trust
timothytrippel pushed 8 commits to earlgrey_1.0.0 timothytrippel/opentitan
- [sival/aes] Add aes_prng_reseed,aes_prng_force_reseed This commit introduces the AES PRNG reseed test (chip_sw_aes_p... f812cf5
- [otbn,sival] Enable scramble test on CW340 After enabling the SecureIbex parameter on CW340 (c.f., lowRISC/opentitan... 10b951d
- [sram_ctrl, sival] Enable CW340 ECC checks for scrambled access By enabling the SecureIbex parameter for CW340 (see ... 7795c8a
- [SiVal, usbdev] Link tx_rx_test to vbus_test in tesplan Signed-off-by: Douglas Reis <[email protected]> (cherry pic... 57f7e58
- [CI, nightly] Fix merge skew Fix a merge issue cause when the commit 40289cc was merged into master. Signed-off-by:... c293e17
- [CI, nightly] Rename tag skip_in_nightly_ci to slow_test The new name will make more sense when we create a job to r... 0eaa506
- [CI, nightly] Add a job to run slow tests on CW340 Signed-off-by: Douglas Reis <[email protected]> (cherry picked f... ef02c51
- [bazel] Support CW340 FPGA target Add support for the CW340 target to Bazel rules for cryptotest. Fixes #24418. Si... d8b43d6
timothytrippel pushed 1 commit to use-ext-clk-with-more-prints timothytrippel/opentitan
- TEST ONLY: DO NOT MERGE; Add more prints. Signed-off-by: Tim Trippel <[email protected]> a91b416
timothytrippel created a branch on timothytrippel/opentitan
use-ext-clk-with-more-prints - OpenTitan: Open source silicon root of trust
timothytrippel pushed 1 commit to use-ext-clk timothytrippel/opentitan
- TEST ONLY: DO NOT MERGE Signed-off-by: Tim Trippel <[email protected]> 49fbc4c
timothytrippel created a branch on timothytrippel/opentitan
use-ext-clk - OpenTitan: Open source silicon root of trust
timothytrippel pushed 3 commits to earlgrey_1.0.0 timothytrippel/opentitan
- [signing] Sign perso binaries At 3c38284af12255535e7e498a4fe252a77375c9a2, sign the personalization binaries. ``` $... 5d2dd80
- [signing] Enable signing `silicon_creator` code with a token Signed-off-by: Chris Frantz <[email protected]> f45f06c
- [manuf] ensure AST is initialized in FT individualize This ensure that AST is initialized in FT individualize firmwa... c531957
timothytrippel pushed 1 commit to earlgrey_1.0.0 lowRISC/opentitan
- [manuf] ensure AST is initialized in FT individualize This ensure that AST is initialized in FT individualize firmwa... c531957
timothytrippel closed a pull request on lowRISC/opentitan
[manuf] ensure AST is initialized in FT individualize
This ensures that AST is initialized in FT individualize firmware. CC: @benjbender
timothytrippel opened a pull request on lowRISC/opentitan
[manuf] ensure AST is initialized in FT individualize
This ensure that AST is initialized in FT individualize firmware. CC: @benjbender
timothytrippel created a branch on timothytrippel/opentitan
fix-ast-config - OpenTitan: Open source silicon root of trust
timothytrippel pushed 8 commits to earlgrey_1.0.0 timothytrippel/opentitan
- [rv_core_ibex, top_earlgrey] Enable SecureIbex for CW340 As the `SecureIbex` configuration is the one we use for the... a8b52f6
- [sival, spi] Add missing argument for passthru test harness on silicon Signed-off-by: Noah Moroze <[email protected]... bb3be1e
- [usb,sival] Add harness for usbdev_test on silicon Requires a small tweak to the harness itself to respect the VBUS ... d88cfd6
- [usb,sival] Add harness for usbdev_pincfg_test on silicon Signed-off-by: Noah Moroze <[email protected]> (cherry pi... e3fe165
- [cryptotest] Switch cryptotest to use the SPI console. This provides about a 5-7x speedup in the overall runtime. S... 6fd3834
- [cryptotest] Re-enable most KAT cryptotests in nightly CI With the speedup from the SPI console, most tests now run ... 547335f
- [ibex,fpga] Fix FPGA related Ibex RF issue This commit manually pulls over lowRISC/ibex#2224 to fix the register fil... 20bf77b
- [ibex,fpga] Fix FPGA related Ibex counter issue This commit fixes the reset logic of the Ibex counter module for the... c643d81
timothytrippel pushed 1 commit to earlgrey_1.0.0 timothytrippel/opentitan
- [orchestrator] add config fields for perso_bin and otp Additional config fields make it easier to specify various pa... 1767bd7